The present invention generally relates to a method of forming an interconnection in a semiconductor device; and more particularly to a method of forming an interconnection by Single Damascene and/or Dual Damascene.
As wiring designs continue to shrink in size, wiring structures become multilayered, and semiconductor devices become highly integrated, it is indispensable to lower interlayer capacitance so as to highly improve speed of a device and to reduce power consumption. In order to lower the interlayer capacitance, low-k materials (low dielectric constant films) are used. The low-k materials, however, have a very low elastic modulus (EM) of approximately 4-6 GPa in the vicinity of a dielectric constant (k) of 2.5 as compared with conventional TEOS-SiO2 having an elastic modulus of 70-80 GPa; hence, it is difficult for the low-k materials to withstand stress that they receive during subsequent processing such as CMP, wiring bonding and packaging.